HLASM - BR = Branch Register
The opcode of the BR extended mnemonic is X'07' with mask B'1111'.
The mask is the third hex digit of the instruction, and - though this is
uncommon - can be regarded as the third hex digit of the opcode as well.
- Perform an unconditional branch.
- Register holding the destination address.
- The processor uses the PSW's two-bit condition code as an index into the
4-bit condition mask.
- The selected mask-bit is always one, so it branches to the address
specified in the second argument.
- The condition code does not change.
- If the destination address is in register 0 no branch will be taken;
instead the CPU will perform a serialization and checkpoint function.
- B branches to a location that is directly
addressable in base-displacement form.
- BCR is the real instruction associated with this
- All hardware supports the BR instruction.
- The PSW's Amode setting determines how many bits are used for the
YREGS * Define register names
XR R15,R15 * Set returncode = 0
BR R14 * Return to caller
To the Opcodes Overview.
To the English Homepage for Hlasm.com.
To the General Homepage for Bixoft and Hlasm.com.
This site is a member of WebRing.
You are invited to browse the
list of mainframe-loving sites.
Dinos are not dead. They are alive and well and living in data centers all
around you. They speak in tongues and work strange magics with computers.
Beware the dino! And just in case you're waiting for the final demise of
these dino's: remember that dinos ruled the world for 155-million years!
Dinos and other anachronisms
[ Join Now
| Ring Hub
Below you find the logo of our
and logos of the web-standards that this page adheres to.