HLASM - BOR = Branch on Ones / Overflow Register
The opcode of the BOR extended mnemonic is X'07' with mask B'0001'.
The mask is the third hex digit of the instruction, and - though this is
uncommon - can be regarded as the third hex digit of the opcode as well.
BOR is used both for Branch on Ones Register and for
Branch on Overflow Register
- Perform a branch if the condition code is 3 or B'11', meaning either
"all ones" or "overflow".
- Condition code 3 may occur after bit operations, such as
TM. Do not use after boolean operations (and, or,
exclusive or) since these do not set condition code 3.
- Condition code 3 may also occur after signed binary calculations, such as
AR. Do not use after multiplication or division, since
these do not set condition code 3.
- Register holding the destination address.
- The processor uses the PSW's two-bit condition code as an index into the
4-bit condition mask.
- If the selected mask-bit is one, then it branches to the address
specified in the second argument. If the bit is zero, then the processor
continues with the next instruction.
- The condition code does not change.
- If the destination address is in register 0 no branch will be taken.
- BO branches to a location that is directly
addressable in base-displacement form.
- BCR is the real instruction associated with this
- All hardware supports the BOR instruction.
- The PSW's Amode setting determines how many bits are used for the
YREGS * Define register names
TM FIELD,MASK * Check bit settings
BOR R14 * Ok, Return
AR R6,R1 * Add to total
BOR R11 * Go handle overflow
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